The present invention relates to binary communication receivers and more particularly to an amplifier feedback circuit for removing amplifier offsets in fiber optic receivers processing balanced code.
Binary communication receivers typically operate with signals in the microvolt or millivolt range which must be amplified to logic levels. Typically, differential input devices are used. The input stage is not perfectly balanced and when multistage amplifiers are used each stage adds and amplifies the previous offsets. When a laser is used to generate optical signals, the laser characteristics can also contribute to the DC offset problem. The differences in input voltages needed to bring the output of the amplifier to zero is called the input offset voltage. Offsets occur due to manufacturing variations in the transistors used in the amplifier. The input offset voltage drifts with temperature and time. Any unbalance is amplified along with the input signal and cause the digitized output of the amplifier to distort the time period of the digitized signals.
High speed digital (gigabit system) fiber optic data systems use balanced coding schemes to simplify the data recovery circuitry. In a balanced coding scheme the average number of high and low bits are equal. In an optical system, where the signal from the amplifier is processed by a clock restoration arrangement which controls a latch, for example, to sample the digital output of the amplifier, the clock restoration circuit relies on the fact that the width of the high and low digital pulses will be equal. When the pulses are not of equal length the bit error rate in sampling the data increases, limiting the data transmission rates that can be achieved. A reduction in pulse width distortion would decrease the bit error rate. In systems where long distances between transmitters and receivers are desired, an increase in the bit error rate adversely affects data integrity. A sensitivity decrease of 10 dbm can result due to offset effects which can result in a distance penalty of approximately 20 kilometers in order to maintain a desired bit error rate.
It is an object of the present invention to provide a feedback circuit for an amplifier receiving balanced code which removes amplifier offsets which would degrade performance.
It is a further object of the present invention to provide a feedback circuit for an amplifier receiving balanced code which allows the best bit error rate achievable, to be obtained from the amplifier.
It is another object of the current invention to provide a feedback circuit which can be implemented on the same integrated circuitry as the amplifier.
It is a still further object of the present invention to provide a level restore circuit to balance amplifier offsets suitable for use with a high gain transimpedance amplifier.